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Ultra low-power CMOS IC using partially-depleted SOI technology

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4 Author(s)
Ebina, A. ; Semicond. Oper. Div., Seiko Epson Corp., Nagano, Japan ; Kadowaki, T. ; Sato, Y. ; Yamaguchi, M.

We have developed an ultra low power IC for wrist-watch application. The realized operation current and voltage were 30 nA and 0.42 V respectively. This extremely low power operation was achieved by taking full advantage of body-floated devices with the partially-depleted SOI CMOS technology

Published in:

Custom Integrated Circuits Conference, 2000. CICC. Proceedings of the IEEE 2000

Date of Conference:

2000