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Phase-locked loop design for on-chip tuning applications

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3 Author(s)
J. I. Osa ; Dept. of Electr. & Electron. Eng., Public Univ. of Navarra, Pamplona, Spain ; A. Carlosena ; A. J. Lopez-Martin

A novel phase-locked loop scheme is proposed, the main application of which is in on-chip tuning circuits. It involves the use of a variable gain amplifier and also a frequency tunable loop filter, providing infinite hold-in range, a fractionally constant pull-out range and also a fractionally constant ripple

Published in:

Electronics Letters  (Volume:36 ,  Issue: 8 )