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Test-set embedding based on width compression for mixed-mode BIST

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2 Author(s)
Chakrabarty, K. ; Dept. of Electr. & Comput. Eng., Duke Univ., Durham, NC, USA ; Das, S.R.

We present a new test generator circuit (TGC) for mixed-mode built-in self-test (BIST) that embeds a precomputed deterministic test set TD in a longer sequence. The design method employs width compression based on the property of d-compatibles. To demonstrate the feasibility of the TGC design methods, we present experimental data for single stuck-at test sets for the ISCAS 85 circuits and full-scan versions of the ISCAS 89 benchmark circuits. We also achieve significant improvement over another recently-proposed mixed-mode TGC design scheme for BIST

Published in:

Instrumentation and Measurement, IEEE Transactions on  (Volume:49 ,  Issue: 3 )

Date of Publication:

Jun 2000

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