Cart (Loading....) | Create Account
Close category search window
 

Design of submicrometer CMOS differential pass-transistor logic circuits

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Pasternak, J.H. ; Dept. of Electr. Eng., Toronto Univ., Ont., Canada ; Salama, C.A.T.

The interaction between the architectural features of CMOS differential pass-transistor logic (DPTL) and the submicron process technology used to implement it are examined. Techniques that exploit the noise immunity associated with the DPTL architecture are presented to effectively enable signal-swing reductions that result in increased speed. The extent to which DPTL can benefit from this signal-swing/speed tradeoff is examined by investigating the impact of device scaling on DPTL operation. A novel DPTL buffer that enables the implementation of a single-phase clocking scheme and the exchange of signal swing for increased circuit speed is proposed. Experimental results are provided

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:26 ,  Issue: 9 )

Date of Publication:

Sep 1991

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.