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Cost-analysis of 4-valued unary functions implemented using current-mode CMOS circuits

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2 Author(s)
Abd-El-Barr, M. ; Dept. of Comput. Eng., King Fahd Univ. of Pet. & Miner., Dhahran, Saudi Arabia ; Al-Mutawa, A.

In this paper we consider the use of the incremental-cost approach for synthesis of 4-valued one-variable functions for implementation using current-mode CMOS (CMCL) circuits. One of the main features of CMCL circuits is the availability of currents flowing in both directions. This should add a degree of freedom which in turn facilitate the use of both positive and negative current values. Intermediate signed functions (both negative and positive) can then be readily available inside the circuits. In this paper we show that efficient use of signed intermediate functions can lead to substantial cost reduction, in terms of the number of devices needed for the implementation of functions. The results obtained using two techniques that use incremental-cost approach for synthesis of 4-valued one-variable functions for CMCL implementation and which use signed intermediate functions are presented and compared

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Multiple-Valued Logic, 2000. (ISMVL 2000) Proceedings. 30th IEEE International Symposium on

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