Referenced Items are not available for this document.
A sigma-delta analog-to-digital converter (ADC) using dynamic dither to achieve a tone-free dynamic range of 102 dB in an audio bandwidth is presented. The design was implemented using a third-order 2:1 cascade architecture with an oversampling ratio of 128. The ADC modulator consumes 22 mW from a 3.0 V power supply, and was fabricated in 0.6-μm CMOS (analog portion) and 0.3-μm CMOS (digital portion) using multichip-module technology
Published in:
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
(Volume:47
,
Issue:
6
)
Date of Publication: Jun 2000
- Page(s):
- 531 - 535
- ISSN :
- 1057-7130
- INSPEC Accession Number:
- 6642017
- Digital Object Identifier :
- 10.1109/82.847068
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Jun 2000
- Sponsored by :
- IEEE Circuits and Systems Society
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