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A novel robust and low cost chips package and its thermal performance

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4 Author(s)
Soon-Jin Cho ; Memory Res. Div., Hyundai Electron. Ind., Kyunggi, South Korea ; Sang-Wook Park ; Myung-Guen Park ; Deok-Hoon Kim

In an attempt to provide a high density memory solution, especially for workstation and PC servers, a stack chips package (SCP) has been developed. The major characteristics of SCP are as follows: (1) SCP contains a plurality of both memory chips and lead frames within a molded plastic package; (2) chip selection is made through the wire bonding option, resulting in the package with a memory capacity twice or four times that of monolithic chip; (3) plural lead frames are electrically interconnected all at once, using metal solders electroplated on the lead frame surface; and (4) SCP is found reliable and cost competitive when compared to other stack packages because it basically adopts the molded plastic packaging technology as well as the metal solder interconnection method. As electrical interconnection methods, both a fluxless soldering joint of Ag/Sn and a high-pressure mechanical joint of Ag were evaluated extensively and they successfully provided a reliable electrical conduction path without any signal degradation. Temperature cycle test and pressure cooker test were proved not to produce any micro cracks across the joint. The thermal performance of SCP was simulated by a thermal model based on finite element method (FEM) and also experimentally verified, showing good agreement within 10% deviation from simulated value. 128M SCP showed better thermal performance than stacked two TSOP's because one chip could serve as a heat sink while the other chip is activated and thermal conduction path through the lead frame is short

Published in:

Advanced Packaging, IEEE Transactions on  (Volume:23 ,  Issue: 2 )