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Use of test structures for Cu interconnect process development and yield enhancement

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4 Author(s)
Skumanich, A. ; Appl. Mater. Inc., Santa Clara, CA, USA ; Man-Ping Cai ; Educato, J. ; Yost, D.

A methodology is described where wafers with specialized test structures are inspected with wafer metrology tools to assist process development for Cu BEOL fabrication. A Cu damascene interconnect process is examined from oxide deposition to final electrical test and the defects are tracked. E-test prioritizes the defects by the electrical impact. The inspection and tracking of defects facilitates defect sourcing, assists root cause analysis, and allows for more effective corrective action to be implemented.

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Microelectronic Test Structures, 2000. ICMTS 2000. Proceedings of the 2000 International Conference on

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