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Noise parameter modeling and SiGe profile design tradeoffs for RF applications

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9 Author(s)
Guofu Niu ; Dept. of Comput. Eng., Auburn Univ., AL, USA ; Shiming Zhang ; Cressler, J.D. ; Joseph, A.J.
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This paper presents a unified approach to optimizing SiGe transistors for low noise. An intuitive model relating transistor structural parameters and biases to noise parameters is introduced, and used to identify the noise limiting factors in a given transistor technology. Issues related to the calibration of 2-D device simulation are discussed. SiGe profile design trade-offs for low noise performance are then presented with experimental results.

Published in:

Silicon Monolithic Integrated Circuits in RF Systems, 2000. Digest of Papers. 2000 Topical Meeting on

Date of Conference:

28-28 April 2000