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An effective defect-oriented BIST architecture for high-speed phase-locked loops

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3 Author(s)
Kim, S. ; Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA ; Soma, M. ; Risbud, D.

We propose a new method of defect-oriented testing of PLL using charge-based frequency measurement BIST (CF-BIST) technique. As no test stimulus is required and the test output is pure digital, low-cost and practical implementation of on-chip BIST for a PLL is possible. Fault simulations using the 900 MHz PLL from National Semiconductor Corp. show higher fault coverage than previous test methods

Published in:

VLSI Test Symposium, 2000. Proceedings. 18th IEEE

Date of Conference:

2000