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ESIM: a multimodel design error and fault simulator for logic circuits

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2 Author(s)
Al-Asaad, H. ; Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA ; Hayes, J.P.

ESIM is a simulation tool that integrates logic fault and design error simulation for logic circuits. It targets several design error and fault models, and uses a novel mix of simulation algorithms based on parallel-pattern evaluation, multiple error activation, single fault propagation, and critical path tracing. Several experiments are discussed to demonstrate the power of ESIM

Published in:

VLSI Test Symposium, 2000. Proceedings. 18th IEEE

Date of Conference:

2000