By Topic

Performance estimation of multiple-cache IP-based systems: case study of an interdependency problem and application of an extended shared memory model

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Sungjoo Yoo ; Sch. of Electr. Eng., Seoul Nat. Univ., South Korea ; Kyoungseok Rha ; Youngchul Cho ; Jinyong Jung
more authors

In estimating the performance of multiple-cache IP-based systems, we face a problem of interdependency between cache configuration and system behavior In this paper we investigate the effects of the interdependency on system performance in a case study. We present a method that gives fast and accurate estimation of system performance by simulating IP cores at the behavioral level with annotated delays and by simulating the multiple-cache communication architecture with an extended shared memory model. Experiments show the effectiveness of the proposed method.

Published in:

Hardware/Software Codesign, 2000. CODES 2000. Proceedings of the Eighth International Workshop on

Date of Conference:

5-5 May 2000