In estimating the performance of multiple-cache IP-based systems, we face a problem of interdependency between cache configuration and system behavior In this paper we investigate the effects of the interdependency on system performance in a case study. We present a method that gives fast and accurate estimation of system performance by simulating IP cores at the behavioral level with annotated delays and by simulating the multiple-cache communication architecture with an extended shared memory model. Experiments show the effectiveness of the proposed method.
Published in:
Hardware/Software Codesign, 2000. CODES 2000. Proceedings of the Eighth International Workshop on
Date of Conference: 5-5 May 2000