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Improving the error detection ability of concurrent checkers by observation point insertion in the circuit under check

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2 Author(s)
Vardanian, V.A. ; STaR Lab., Inst. of Inf. & Autom. Problems, Yerevan, Armenia ; Mirzoyan, L.B.

Summary form only given. A heuristic design-for-checkability method based on observation point insertion in the Circuit Under Check (CUC) is proposed to increase the error detection ability of Concurrent Checkers (CC). In particular at least 99% of error detection is obtained for parity checkers and almost all ISCAS'85 benchmark circuits by inserting 2-5 groups of observation points compacted by parity trees

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Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings

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