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An brief overview is given of the voltage generator system of a 1-Gb synchronous DRAM. The design serves as an example for a state-of-the-art DRAM voltage generator system. A general analysis of the required controlling functionality is derived. A universal and flexible controlling scheme for a voltage generator system is presented, which can easily be modified for future voltage generator design. The main aspect of this controlling scheme is a clear separation between logic (digital) controlling functions and (analog) voltage generating functions. A control path that supplies the various voltage generator blocks with configuration information is introduced. Last, the control path is shown to have an additional advantage of increased testability. Hardware results verifying the concept are presented.
Date of Publication: April 2000