Referenced Items are not available for this document.
Voice-over-internet protocol (VoIP) terminals used in business phone, speakerphone and wireless applications require a low-power integrated solution suitable for the limited chassis area of these devices. This 200 MHz VoIP terminal processor is implemented in a 0.18 /spl mu/m 5-metal-layer CMOS process with 2 Mb of SRAM. The chip contains 16 M transistors in a 6.35/spl times/6.35 mm/sup 2/ die. This processor chip implements a complete VoIP terminal solution from raw digitized handset audio samples to compressed internet protocol (IP) packetized media independent interface (MII) signals.
Published in:
Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International
Date of Conference: 9-9 Feb. 2000
- Page(s):
- 236 - 237
- Meeting Date :
- 07 Feb 2000-09 Feb 2000
- ISSN :
- 0193-6530
- Print ISBN:
- 0-7803-5853-8
- INSPEC Accession Number:
- 6629512
- Conference Location :
- San Francisco, CA, USA
- Digital Object Identifier :
- 10.1109/ISSCC.2000.839765
- Product Type:
- Conference Publications
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