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Voice-over-internet protocol (VoIP) terminals used in business phone, speakerphone and wireless applications require a low-power integrated solution suitable for the limited chassis area of these devices. This 200 MHz VoIP terminal processor is implemented in a 0.18 /spl mu/m 5-metal-layer CMOS process with 2 Mb of SRAM. The chip contains 16 M transistors in a 6.35/spl times/6.35 mm/sup 2/ die. This processor chip implements a complete VoIP terminal solution from raw digitized handset audio samples to compressed internet protocol (IP) packetized media independent interface (MII) signals.
Date of Conference: 9-9 Feb. 2000