By Topic

A 200 MHz 0.25 W packet audio terminal processor for voice-over-internet protocol applications

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

13 Author(s)
Martin, B. ; 8/spl times/8 Inc., Santa Clara, CA, USA ; Buckley, I. ; Bednarz, P. ; Chrissan, D.
more authors

Voice-over-internet protocol (VoIP) terminals used in business phone, speakerphone and wireless applications require a low-power integrated solution suitable for the limited chassis area of these devices. This 200 MHz VoIP terminal processor is implemented in a 0.18 /spl mu/m 5-metal-layer CMOS process with 2 Mb of SRAM. The chip contains 16 M transistors in a 6.35/spl times/6.35 mm/sup 2/ die. This processor chip implements a complete VoIP terminal solution from raw digitized handset audio samples to compressed internet protocol (IP) packetized media independent interface (MII) signals.

Published in:

Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International

Date of Conference:

9-9 Feb. 2000