Skip to Main Content
The transceiver chip targets the digital enhanced cordless telecommunication (DECT) standard. Integration level and cost are driven by competition in the wireless market. The transceiver IC is realized on the 25 GHz bipolar process. It is primarily suitable for FSK digital mobile radio portable and base stations. The transceiver IC integrates the complete synthesizer including PLL and fully-integrated VCOs for transmit and receive. The receiver is a single-conversion heterodyne architecture with an image-reject frontend. For demodulation of the FSK modulated signal a coincidence demodulator requiring no external adjustment is used. The IC is packaged in a low-cost TSSOP 38 package. The complete transceiver operates from 3.1 V to 5.1 V and needs no external tuning or trimming.