FPGA to ASIC conversion design methodology with the support for fast retargetting to different CMOS implementation technologies

This paper discuss the conversion methodology that allows a user of Xilinx FPGA technology to automatically convert a XNF based design in ASIC ready for fabrication. The conversion methodology is based on the developed software package f2a and Alliance tool set as a back-end tool. The f2a package can accept XNF netlist that is mapped (converted) to structural VHDL description. The main features of the software package are described as well as data structure. The conversion methodology is described in details and applied solutions to overcome differences between FPGA technology and target VHDL library are presented.