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VLSI architectures for multidimensional transforms

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2 Author(s)
Chakrabarti, C. ; Dept. of Electr. Eng., Arizona State Univ., Tempe, AZ, USA ; JaJa, J.

The authors propose a family of VLSI architectures with area-time tradeoffs for computing (N×N× . . . ×N) d-dimensional linear separable transforms. For fixed-precision arithmetic with b bits, the architectures have an area A=O(Nd+2a) and computation time T=O(dNd/2-ab ), and achieve the AT2 bound of AT2=O(n2b 2) for constant d, where n=Nd and O<ad/2

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Computers, IEEE Transactions on  (Volume:40 ,  Issue: 9 )