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Browse Conference Publications > Mixed-Signal Design, 2000. SS ... Help

High-level modeling of a high-speed flash A/D converter for mixed-signal simulations of digital telecommunication front-ends

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7 Author(s)
Compiet, J. ; IMEC, Leuven, Belgium ; de Jong, P. ; Wambacq, P. ; Vandersteen, G.
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A hierarchical high-level model of a high-speed flash ADC is presented. The input parameter list is extracted from a 400 MHz, 4-bit, flash ADC designed in HSPICE in a 0.35 μm CMOS technology. A speedup in simulation time of 5000 is reported compared to the 3-bit flash ADC HSPICE simulations. The accuracy of the model is verified with HSPICE simulations and shows a good agreement

Published in:
Mixed-Signal Design, 2000. SSMSD. 2000 Southwest Symposium on

Date of Conference: 2000

Page(s):
135 - 140
Meeting Date :
27 Feb 2000-29 Feb 2000
Print ISBN:
0-7803-5975-5
INSPEC Accession Number:
6615751
Conference Location :
San Diego, CA
Digital Object Identifier :
10.1109/SSMSD.2000.836461
Product Type:
Conference Publications

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