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High-performance deep submicron CMOS technologies with polycrystalline-SiGe gates

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5 Author(s)
Y. V. Ponomarev ; Philips Res. Lab., Eindhoven, Netherlands ; P. A. Stolk ; C. Salm ; J. Schmitz
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The use of polycrystalline SiGe as the gate material for deep submicron CMOS has been investigated. A complete compatibility to standard CMOS processing is demonstrated when polycrystalline Si is substituted with SiGe (for Ge fractions below 0.5) to form the gate electrode of the transistors. Performance improvements are achieved for PMOS transistors by careful optimization of both transistor channel profile and p-type gate workfunction, the latter by changing Ge mole fraction in the gate. For the 0.18 μm CMOS generation we record up to 20% increase in the current drive, a 10% increase in the channel transconductance and subthreshold swing improvement from 82 mV/dec to 75 mV/dec resulting in excellent “on”/“off” currents ratio. At the same time, NMOS transistor performance is not affected by gate material substitution

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IEEE Transactions on Electron Devices  (Volume:47 ,  Issue: 4 )