By Topic

A high-performance ATM switch with multicasting

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
J. D. Ho ; Sch. of Comput. Sci. & Comput. Eng., La Trobe Univ., Bundoora, Vic., Australia ; N. K. Sharma

This paper presents an ATM switch that fulfills the architectural and service requirements of large-scale ATM switches. The proposed network is based on a 3-stage Clos network, with shared-memory ATM switches at the input and output stages to provide optimal cell loss and delay performance. Unlike other Clos based networks, this paper proposes a simple distributive routing algorithm for any sized network. Distributive multicasting allows multiple multicast cells to be routed simultaneously through the network, which removes the problem of multicast congestion. The performance of shared-memory switches can be further improved by implementing a buffer management scheme. The proposed write and read policies can adapt to changes in traffic, so an optimum unicast/multicast mix can be maintained. In total, the proposed ATM switch delivers the characteristics required for future ATM services

Published in:

Global Telecommunications Conference, 1999. GLOBECOM '99  (Volume:2 )

Date of Conference: