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Design and optimization of a parallel architecture dedicated to image matching

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5 Author(s)
Pissaloux, E.E. ; Lab. de Robotique de Paris, Velizy, France ; Le Coat, F. ; Bonnin, P. ; Tissot, A.
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The design and optimised (in time and space) implementation of a systolic circuit dedicated to aerial image matching is proposed. The final run time data adaptive architecture evaluation with Xilinx XC 4010 XL offers the equivalent processing speed-up of 2000 (compared to a sequential solution).

Published in:

Image Processing, 1999. ICIP 99. Proceedings. 1999 International Conference on  (Volume:2 )

Date of Conference:

24-28 Oct. 1999