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Direct implementation of 2-D DCT on a low-cost linear-array architecture without intermediate transpose memory

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2 Author(s)
Shen-Fu Hsiao ; Inst. of Comput. & Inf. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan ; Jian-Ming Tseng

A direct method for the computation of 2-D DCT on a linear-array architecture is presented. The original 2-D DCT is converted into 1-D problem with representation of matrix-vector product. Then, we propose a fast algorithm with low computation complexity, and exploit an efficient mapping technique to generate from the algorithm a hardware-efficient architecture. Unlike other 2-D DCT processors that usually require transpose memory, our new architecture is easily pipelined for purpose of high throughput rate and is easily scalable for the computation of longer-length DCT

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Signal Processing Systems, 1999. SiPS 99. 1999 IEEE Workshop on

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