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CMOS output stages for low-voltage power supplies

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3 Author(s)
G. Palmisano ; DEES, Catania Univ., Italy ; G. Palumbo ; R. Salerno

Compact and power-efficient CMOS output stages are presented and compared by designing two low-voltage operational amplifiers with similar gain and gain-bandwidth performance. The amplifiers were realized in a standard 1.2-μm CMOS process with threshold voltages around 0.8 V and using a 1.5-V power supply. They achieve an open-loop gain and a gain-bandwidth product close to 65 dB and 1 MHz, respectively. By connecting them in unity-gain configuration and delivering a 1-V peak-to-peak output voltage into a 500 Ω and 50 pF load, total harmonic distortions of -77 and -67 dB can be achieved, while using quiescent currents as low as 50 μA in the output branches

Published in:

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing  (Volume:47 ,  Issue: 2 )