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Automatic software toolkit generation for embedded systems-on-chip

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5 Author(s)
A. Halambi ; Center for Embedded Comput. Syst., California Univ., Irvine, CA, USA ; P. Grun ; H. Tomiyama ; N. Dutt
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Modern embedded Systems-on-Chips (SOCs) will allow the system designer to customize Intellectual Property (IP) cores (fixed and programmable), together with custom logic and large amounts of embedded memory. As the software content in these emerging embedded SOCs begins to dominate the SOC design process, there is a critical need for support of an integrated software development environment (including compilers, simulators and debuggers). Furthermore, since many characteristics of these processor core IPs (e.g., instruction-sets, memory configurations) are increasingly customizable, the entire software toolkit chain needs to be customized and generated to support both early design space exploration (for performance, power and cost constraints), as well as high-qualify software generation. This paper first surveys recent efforts in Architecture Description Languages (ADLs) used to perform early validation and exploration of SOC architectures. The second part of the paper focuses on approaches to software toolkit generation that automatically produce the software infrastructure (e.g., compilers, simulators, debuggers) which will enable true hardware/software codesign of these emerging embedded SOCs

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VLSI and CAD, 1999. ICVC '99. 6th International Conference on

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