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High-performance energy-efficient D-flip-flop circuits

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2 Author(s)
Uming Ko ; Texas Instrum. Inc., Dallas, TX, USA ; Balsara, P.T.

This paper investigates performance, power, and energy efficiency of several CMOS master-slave D-flip-flops (DFF's). To improve performance and energy efficiency, a push-pull DFF and a push-pull isolation DFF are proposed. Among the five DFF's compared, the proposed push-pull isolation circuit is found to be the fastest with the best energy efficiency. Effects of using a double-pass-transistor logic (DPL) circuit and tri-state push-pull driver are also studied. Last, metastability characteristics of the five DFP's are also analyzed.

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Very Large Scale Integration (VLSI) Systems, IEEE Transactions on  (Volume:8 ,  Issue: 1 )