By Topic

A test-pattern-generation algorithm for sequential circuits

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
E. Auth ; Tech. Univ. of Munich, Germany ; M. H. Schulz

A deterministic test-pattern-generation algorithm for synchronous sequential circuits is presented. The algorithm, called Essential, takes advantage of a procedure for learning global implications. It uses static and dynamic dominance relationships among signals, the concept of the potential propagation path, and intelligent heuristics to guide and accelerate the decision-making process for deterministic automatic test pattern generation (ATPG). Essential is based on the well-known method of reverse time processing, but it applies forward processing within time frames to avoid disadvantageous a priori determination of a path to be sensitized or of a primary output to which the fault effects must be propagated. It is designed to exploit fully the sophisticated techniques used for combinational circuits in the Socrates ATPG system. Experimental results for sequential ATPG obtained with Essential (implemented in C on a Sequent Symmetry computer) are reported.<>

Published in:

IEEE Design & Test of Computers  (Volume:8 ,  Issue: 2 )