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ESD performance optimization of ballast resistor on power AlGaAs-GaAs heterojunction bipolar transistor technology

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7 Author(s)
Chu, C.Y. ; Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA ; Li, G.P. ; Ho, W.J. ; Hsu, H.Y.
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Key parameters in power heterojunction bipolar transistor (HBT) ESD design are identified. ESD survivability under forward bias stress is significantly affected by the ballast resistor design, while under reverse bias, it is the peak stress current. Optimization of the design of ballast resistors should enhance both forward and reverse bias stress performance.

Published in:

Electrical Overstress/Electrostatic Discharge Symposium Proceedings, 1999

Date of Conference:

28-30 Sept. 1999