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Analysis of the trade-off between bandwidth, resolution, and power in ΔΣ analog to digital converters

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4 Author(s)
A. Marques ; ESAT, Katholieke Univ., Leuven, Heverlee, Belgium ; V. Peluso ; M. Steyaert ; W. Sansen

The trade-off relationship between bandwidth, resolution, and power in ΔΣ ADCs realized in CMOS technologies is studied. The design of ΔΣ converters is discussed in order to achieve an optimum trade-off between bandwidth, resolution, and power, or alternatively the maximum bandwidth, resolution product. A best case estimation of this trade-off is derived and compared with the known limits imposed by noise and matching. It is shown that the fundamental limit imposed by noise, when circuit considerations are taken into account, becomes comparable to the matching limit in current technologies. Therefore, even if the matching characteristics of technologies improve, the bandwidth, resolution, and power trade-off of conventional ΔΣ converters will not improve significantly

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Electronics, Circuits and Systems, 1998 IEEE International Conference on  (Volume:2 )

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