Referenced Items are not available for this document.
In this work we propose a new analog CMOS realisation of a cell structure for a Discrete-Time Cellular Neural Network (DTCNN) with a view to implementing a multilayer network for image segmentation based on active contours. Each cell operates in a transresistance manner with a final latch controlled by a single clock phase. The operation with the templates, for the calculation of internal states is provided by voltage programmable current multipliers. The validity of the structure is illustrated by electric HSPICE simulations for an 8×8 DTCNN array, constituted by transistors belonging to the 0.7 μm technology process of ES2
Published in:
Electronics, Circuits and Systems, 1998 IEEE International Conference on
(Volume:3
)
Date of Conference: 1998
- Page(s):
- 285 - 288 vol.3
- Meeting Date :
- 07 Sep 1998-10 Sep 1998
- Print ISBN:
- 0-7803-5008-1
- INSPEC Accession Number:
- 6513213
- Conference Location :
- Lisboa
- Digital Object Identifier :
- 10.1109/ICECS.1998.813988
- Product Type:
- Conference Publications
About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies
A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.
