By Topic

Symbolic synthesis of analog-to-digital conversion architectures using direct-mapping techniques

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Weibiao Zhang ; Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA ; Huimin Xia ; R. Al-Omari ; M. Hassoun

This paper discusses a methodology for system level synthesis of Analog-to-Digital Converters (ADCs). The synthesis process takes symbolic or numeric user specifications as the input, transfers them into the choice of one or more possible architectures and directly maps the choosen ADC architecture into a functional topology. The different possible target ADC architectures are modeled as functional hierarchies within the knowledge-based software system. The algorithm hierarchically constructs a symbolic block level implementation of the architecture that best satisfies the given specifications

Published in:

Electronics, Circuits and Systems, 1998 IEEE International Conference on  (Volume:3 )

Date of Conference: