Referenced Items are not available for this document.
This paper reports 1.5 V CMOS bootstrapped dynamic logic circuit techniques (BDLCT) suitable for low-voltage deep-submicron CMOS VLSI. Using BDLCT, the maximum operating frequency of a digital quadrature modulator is 482 MHz at 5 V and 68 MHz at 1.5 V. Compared to the circuit without BDLCT, the 12-bit delay time of a 16-bit adder with BDLCT is improved by 56% at 1.5 V
Published in:
Electronics, Circuits and Systems, 1998 IEEE International Conference on
(Volume:3
)
Date of Conference: 1998
- Page(s):
- 171 - 174 vol.3
- Meeting Date :
- 07 Sep 1998-10 Sep 1998
- Print ISBN:
- 0-7803-5008-1
- INSPEC Accession Number:
- 6513188
- Conference Location :
- Lisboa
- Digital Object Identifier :
- 10.1109/ICECS.1998.813960
- Product Type:
- Conference Publications
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