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Packaging optoelectronic stacked processors and free-space optical interconnects

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6 Author(s)
Esener, S. ; California Univ., San Diego, La Jolla, CA, USA ; Marchand, P. ; Ozguz, V. ; Liu, Y.
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The 3D-OESP Consortium is a government-industry-university collaboration dedicated to the development of the technologies required to integrate stacked silicon chips with optoelectronic devices for high-performance computing and switching applications

Published in:
LEOS '99. IEEE Lasers and Electro-Optics Society 1999 12th Annual Meeting  (Volume:1 )

Date of Conference: 1999

Page(s):
94 - 95 vol.1
Meeting Date :
08 Nov 1999-11 Nov 1999
ISSN :
1092-8081
Print ISBN:
0-7803-5634-9
INSPEC Accession Number:
6558903
Conference Location :
San Francisco, CA
Digital Object Identifier :
10.1109/LEOS.1999.813493
Product Type:
Conference Publications

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