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Implementation of a combined high-speed interpolation and decimation wave digital filter

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3 Author(s)
Ohlsson, H. ; Dept. of Electr. Eng., Linkoping Univ., Sweden ; Johansson, H. ; Wanhammar, L.

In this paper we discuss the design and implementation of a novel class of high-speed wave digital filter structures for interpolation and decimation. Four different structures were compared with respect to chip area, power consumption and speed. The best of these structures was combined into an interpolation and decimation filter and has been implemented using redundant arithmetic and standard cells

Published in:

Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on  (Volume:2 )

Date of Conference:

5-8 Sep 1999