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SOI digital circuits: design issues

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2 Author(s)
Puri, R. ; IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA ; Chuang, C.T.

This paper reviews the recent advances in SOI digital CMOS circuits. Particular emphases is placed on the impact of floating-body in partially-depleted devices on the circuit operation, stability, and functionality. Unique SOI design aspects such as parasitic bipolar effect and hysteretic VT variation are addressed. Circuit techniques to improve the noise immunity and global design issues are also addressed

Published in:

VLSI Design, 2000. Thirteenth International Conference on

Date of Conference:

2000