Referenced Items are not available for this document.
In this paper, we propose a new strategy (KORA-2) for the replacement of lines in cache memories. The algorithm is efficient and easily implementable. Trace-driven simulations were performed for 42 different cache configurations using benchmark programs from SPEC92 (Standard performance Evaluation Corporation) benchmark suites. Simulation results illustrate that our algorithm can provide a peak value of approximately 8.71% improvement in the miss ratio over the best performing conventional algorithm (LRU) for the selected benchmark trace files generated from SPEC programs. This translates to a savings of hundreds of thousands of misses for typical programs referencing well over 100 million addresses
Published in:
Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on
(Volume:1
)
Date of Conference: 1999
- Page(s):
- 265 - 269 vol.1
- Meeting Date :
- 05 Sep 1999-08 Sep 1999
- Print ISBN:
- 0-7803-5682-9
- INSPEC Accession Number:
- 6544266
- Conference Location :
- Pafos
- Digital Object Identifier :
- 10.1109/ICECS.1999.812274
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