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SAMC: a code compression algorithm for embedded processors

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2 Author(s)
Lekatsas, H. ; Dept. of Electr. Eng., Princeton Univ., NJ, USA ; Wolf, W.

In this paper, we present a method for reducing the memory requirements of an embedded system by using code compression. We compress the instruction segment of the executable running on the embedded system, and we show how to design a run-time decompression unit to decompress code on the fly before execution. Our algorithm uses arithmetic coding in combination with a Markov model, which is adapted to the instruction set and the application. We provide experimental results on two architectures, Analog Devices' Share and ARM's ARM and Thumb instruction sets, and show that programs can often be reduced by more than 50%. Furthermore, we suggest a table-based design that allows multibit decoding to speed up decompression

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:18 ,  Issue: 12 )