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An effective methodology for mixed scan and reset design based on test generation and structure of sequential circuits

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2 Author(s)
Hsing-Chung Liang ; Dept. of Electron. Eng., Chang Gung Univ., Tao-Yuan, Taiwan ; Chung Len Lee

In this paper, a flip-flop selection methodology, which utilizes reachable states of flip-flops, required states for hard-to-detect faults, which are obtained from test generation, and the structural connection relationship of flip-flops, to achieve a nearly optimal mixed partial-scan/reset design, is proposed. The methodology first generates and simulates test patterns for the circuit-under-test to obtain information of reachable states and states needed for excitation and propagation of hard-to-detect faults. It then searches the connection relationship among flip-flops and arranges flip-flops in an appropriate order for mixed partial scan and reset selection. Experimental results show that the method achieves higher testability than reported methods with a lesser number of scan/reset flip-flops

Published in:

Test Symposium, 1999. (ATS '99) Proceedings. Eighth Asian

Date of Conference:

1999