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Synthesis of symmetric and nonsymmetric lattice digital filters which are free of constant-input limit cycles

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2 Author(s)
P. S. R. Diniz ; Programa de Engenharia Electr. COPPE/Federal Univ. of Rio de Janeiro, Brazil ; M. Sarcinelli

Syntheses procedures for lattice digital filter structures which can be free of constant-input limit cycles are presented. As a result, the realizations derived, in most cases, maintain the desirable properties of the original lattice while being free of constant-input limit cycles. The symmetric lattice structures, which are amenable to efficient VLSI implementation, are considered regarding their freedom from zero-input and constant-input limit cycles. The pertaining syntheses procedures are presented. Experimental results are included to compare the several realizations discussed with respect to output roundoff noise and multiplier coefficients sensitivity

Published in:

IEEE Transactions on Signal Processing  (Volume:39 ,  Issue: 4 )