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Design of a novel synthesis filter for real-time MPEG-2 audio decoder implementation on a DSP chip

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2 Author(s)
Won-Kyu Paik ; Dept. of Electron. Eng., Sogang Univ., Seoul, South Korea ; Sun-Young Hwang

This paper describes the design of a novel synthesis filter for real-time implementation of MPEG-2 audio decoder on a single, programmable DSP chip. In the first phase of our design we propose a fast subband synthesis filter bank employing a decomposed IDCT block with reduced multiplication stages, shared by both MPEG-1 and MPEG-2 decoders. In the second phase of the design, a parameter analyzer block is adopted to take advantage of the multichannel computing structure in MPEG-2 thereby further reducing the number of MAC operations. In the final phase, we propose a low-cost decoder employing unorthodox methods of boosting performance by gracefully degrading quality of service. The overall runtime of the decoder has been reduced by 60% when compared to the modified ISO decoder employing a synthesis filter bank with fast IDCT block. Real-time performance validation have been made by re-tuning time-critical code sections for both native VLIW and DSP architectures. The final implementation successfully passes all ISO/IEC MPEG-2 audio compliance tests and achieves near-transparent audio decoding and signal reconstruction on the fly.

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Consumer Electronics, IEEE Transactions on  (Volume:45 ,  Issue: 4 )