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A linear systolic array for the discrete cosine transform, discrete sine transform, and their inverses is developed. It generates the transform kernel values recursively. Compared to the scheme with the transform kernel values prestored in memory either inside or outside each processing element, the clock period is shortened by a memory access time. In addition, the array pays no cost for prestorage. The systolic array has the advantages of pipelinability, regularity, locality, and scalability, making it quite suitable for VLSI signal processing
Published in:
Signal Processing, IEEE Transactions on
(Volume:39
,
Issue:
1
)
Date of Publication: Jan 1991
- Page(s):
- 192 - 194
- ISSN :
- 1053-587X
- INSPEC Accession Number:
- 3905281
- Digital Object Identifier :
- 10.1109/78.80779
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Jan 1991
- Sponsored by :
- IEEE Signal Processing Society
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