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A low-power video 10-bit CMOS D/A converter using modified look-ahead circuit

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2 Author(s)
Yang Xu ; Syst. State Key Lab., ASIC, Shanghai, China ; Hao Min

This paper describes a 10 bit 50 MSample/s CMOS D/A Converter fabricated in a 1 μm single-poly double-metal CMOS process. About 30% power can be saved in a video application by using a modified look-ahead circuit. The INL is less than 0.46 LSB, and the DNL is less than 0.03 LSB in the power-save mode. The settling time to 0.1% is less than 20 ns. At 50 MS/s the SFDR is 60 dB. This D/A converter has a single power supply of 5 V, and, at 50 M/s when the input is all zero, dissipates 20 mW, and when the input is all one, dissipates 250 mW. The core chip size is 1.4 mm×2.8 mm

Published in:

ASIC/SOC Conference, 1999. Proceedings. Twelfth Annual IEEE International

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