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Leading-one prediction with concurrent position correction

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2 Author(s)
Bruguera, J.D. ; Dept. of Electron. & Comput. Eng., Santiago de Compostela Univ., Spain ; Lang, T.

This paper describes the design of a leading-one prediction (LOP) logic for floating-point addition with an exact determination of the shift amount for normalization of the adder result. Leading-one prediction is a technique to calculate the number of leading zeros of the result in parallel with the addition. However, the prediction might be in error by one bit and previous schemes to correct this error result in a delay increase. The design presented here incorporates a concurrent position correction logic, operating in parallel with the LOP, to detect the presence of that error and produce the correct shift amount. We describe the error detection as part of the overall LOP, perform estimates of its delay and complexity, and compare with previous schemes

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Computers, IEEE Transactions on  (Volume:48 ,  Issue: 10 )