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Systematic deletion/insertion error correcting codes with random error correction capability

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3 Author(s)
Saowapa, K. ; Graduate Sch. of Inf. Sci. & Eng., Tokyo Inst. of Technol., Japan ; Kaneko, H. ; Fujiwara, E.

This paper presents a class of binary block codes capable of correcting single synchronization error and single reversal error with fewer check bits than the existing codes. This also shows a decoding circuit and analyzes its complexity

Published in:

Defect and Fault Tolerance in VLSI Systems, 1999. DFT '99. International Symposium on

Date of Conference:

Nov 1999