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High speed I/O circuit design in multiple voltage domains

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3 Author(s)
Jex, J. ; Intel Corp., DuPont, WA, USA ; Griffin, J. ; Johnson, D.R.

Designing I/O drivers and receivers that must work across multiple voltage domains has several unique circuit-design challenges. One challenge is limitations due to process silicon breakdown voltage. A second disadvantage is the need to transition voltage levels. This is typically done with differential amplifier receivers, special high voltage N or P devices, external pull-ups, or voltage translators. Due to differences in switching levels, matching TCO delays though identical receivers in different voltage domains will require additional consideration. Finally, system level simulations of chips crossing multiple voltage domains require 4 terminal devices, non-single global power supply nodes, and must handle multiple process technology files

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Communications, Computers and Signal Processing, 1999 IEEE Pacific Rim Conference on

Date of Conference: