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Using dynamic cache management techniques to reduce energy in a high-performance processor

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3 Author(s)
Bellas, N. ; Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana, IL, USA ; Hajj, I. ; Polychronopoulos, C.

In this paper, we propose a technique that uses an additional mini cache, the LO-Cache, located between the instruction cache (I-Cache) and the CPU core. This mechanism can provide the instruction stream to the data path and, when managed properly, it can effectively eliminate the need for high utilization of the more expensive I-Cache. In this work, we propose, implement, and evaluate a series of run-time techniques for dynamic analysis of the program instruction access behavior, which are then used to preactively guide the access of the LO-Cache. The basic idea is that only the most frequently executed portions of the code should be stored in the LO-Cache since this is where the program spends most of its time. We present experimental results to evaluate the effectiveness of our scheme in terms of performance and energy dissipation for a series of SPEC95 benchmarks. We also discuss the performance and energy tradeoffs that are involved in these dynamic schemes.

Published in:

Low Power Electronics and Design, 1999. Proceedings. 1999 International Symposium on

Date of Conference:

17-17 Aug. 1999