Referenced Items are not available for this document.
The concept of future scaling-down for RF CMOS technology has been investigated in terms of f/sub T/, f/sub max/, RF noise, linearity, and matching characteristics, based on simulation and experiments. It has been found that gate width and finger length are key parameters, especially in sub-100 nm gate length generations.
Published in:
VLSI Technology, 1999. Digest of Technical Papers. 1999 Symposium on
Date of Conference: 14-16 June 1999
- Page(s):
- 163 - 164
- Meeting Date :
- 14 Jun 1999-16 Jun 1999
- Print ISBN:
- 4-930813-93-X
- INSPEC Accession Number:
- 6490144
- Conference Location :
- Kyoto, Japan
- Digital Object Identifier :
- 10.1109/VLSIT.1999.799394
- Product Type:
- Conference Publications
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