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Transistor design issues in integrating analog functions with high performance digital CMOS

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8 Author(s)
Chatterjee, A. ; Silicon Technol. Dev., Texas Instrum. Inc., Dallas, TX, USA ; Vasanth, K. ; Grider, D.T. ; Nandakumar, M.
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Pocket or halo designs used in high performance digital CMOS design can degrade analog device performance. A new understanding of this phenomenon is presented using device simulation. The effect of pocket implant parameters on the trade-off between digital and analog performance is studied experimentally. Experimental data showing the beneficial effects of eliminating the pocket selectively from the drain end on analog performance is also shown.

Published in:

VLSI Technology, 1999. Digest of Technical Papers. 1999 Symposium on

Date of Conference:

14-16 June 1999