By Topic

Channel engineering for high speed sub-1.0 V power supply deep sub-micron CMOS

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Baohong Cheng ; Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA ; Inani, A. ; Rao, R. ; Woo, J.C.S.

The effects of channel engineering on device performance have been extensively investigated. The lateral asymmetric channel (LAC) MOSFETs show significantly higher I/sub dsat/ and g/sub msat/, lower I/sub off/, and superior short-channel performance compared with double-halo (DH) and conventional MOSFETs by effectively utilizing the velocity overshoot effects. It is demonstrated that the device switching speed of the LAC device at V/sub DD/=0.6 V is equivalent to that of a conventional device operated at V/sub DD/=1.5 V.

Published in:

VLSI Technology, 1999. Digest of Technical Papers. 1999 Symposium on

Date of Conference:

14-16 June 1999